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Readings in Hardware/software Co-design
  • Language: en
  • Pages: 697

Readings in Hardware/software Co-design

This title serves as an introduction ans reference for the field, with the papers that have shaped the hardware/software co-design since its inception in the early 90s.

Networks on Chips
  • Language: en
  • Pages: 408

Networks on Chips

  • Type: Book
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  • Published: 2006-08-30
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  • Publisher: Elsevier

The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions. * Leading-edge research from world-renowned experts in academia and industry with state-of-the-art technology implementations/trends * An integrated presentation not currently available in any other book * A thorough introduction to current design methodologies and chips designed with NoCs

Synthesis & Optimizatn Of Dig. Circuits
  • Language: en

Synthesis & Optimizatn Of Dig. Circuits

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Nanosystems Design and Technology
  • Language: en
  • Pages: 177

Nanosystems Design and Technology

Nanosystems use new, nanoscopic electrical and/or mechanical devices which, as constituents of electronic and electromechanical systems, find application primarily in computing, embedded control and biomedical data acquisition. In particular, this book will deal with the characterization and patterning of these materials from an engineering perspective, with the objective of creating operational prototypes and products. The book will integrate various nano technologies on materials, devices and systems and identify key areas and results. The book will describe different design aspects for integrated systems on silicon, as well as on heterogeneous platforms including, but not limited to, electrical, optical, micromechanical and biological components in various forms and mixtures. By associating research topics from differing horizons, the book will provide a unique opportunity to bridge the gap between electronics/electrical engineering and materials science. The book will include topics at the intersection of these disciplines, and will interface with computer science, biology and medicine.

Dynamic Power Management
  • Language: en
  • Pages: 231

Dynamic Power Management

Dynamic power management is a design methodology aiming at controlling performance and power levels of digital circuits and systems, with the goal of extending the autonomous operation time of battery-powered systems, providing graceful performance degradation when supply energy is limited, and adapting power dissipation to satisfy environmental constraints. Dynamic Power Management: Design Techniques and CAD Tools addresses design techniques and computer-aided design solutions for power management. Different approaches are presented and organized in an order related to their applicability to control-units, macro-blocks, digital circuits and electronic systems, respectively. All approaches a...

Solutions Manual to Accompany Synthesis and Optimization of Digital Circuits
  • Language: en
  • Pages: 130
Designing Reliable and Efficient Networks on Chips
  • Language: en
  • Pages: 198

Designing Reliable and Efficient Networks on Chips

Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum power-area overhead is a major challenge. With technology scaling, as the geometries of on-chip devices reach the physical limits of operation, another important design challenge for NoCs will be to provide dynamic (run-time) support against permanent and intermittent faults that can occur in the system. The purpose of Designing Reliable and Efficient Networks on Chips is to provide state-of-the-art methods to solve some of the most important and time-intensive problems encountered during NoC design.

High Level Synthesis of ASICs under Timing and Synchronization Constraints
  • Language: en
  • Pages: 294

High Level Synthesis of ASICs under Timing and Synchronization Constraints

Computer-aided synthesis of digital circuits from behavioral level specifications offers an effective means to deal with increasing complexity of digital hardware design. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses both theoretical and practical aspects in the design of a high-level synthesis system that transforms a behavioral level description of hardware to a synchronous logic-level implementation consisting of logic gates and registers. High Level Synthesis of ASICs Under Timing and Synchronization Constraints addresses specific issues in applying high-level synthesis techniques to the design of ASICs. This complements previous results achieved in...

La leggenda di re Bove
  • Language: en
  • Pages: 48

La leggenda di re Bove

  • Type: Book
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  • Published: 2016-12-23
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  • Publisher: Unknown

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Synteza i optymalizacja układów cyfrowych
  • Language: en
  • Pages: 638

Synteza i optymalizacja układów cyfrowych

  • Type: Book
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  • Published: 1999-01
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  • Publisher: Unknown

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